1. Field of the Invention
The present invention relates to power supply devices that are used to stably operate TVs, VCRs, DVD players, DVD recorders, personal computers, peripheral devices therefor, various household appliances, and the like.
2. Description of Related Art
In a conventional power supply device 1, as shown in FIG. 9, an IC 15 including a PNP transistor and other components are typically integrated on a single chip, and are then molded in a resin package as a single device.
To alleviate the power loss through the power supply device 1 and simultaneously achieve stable power supply therefrom, there have recently been put on the market devices having a two-chip structure wherein, as shown in FIG. 10, a control IC 16 fabricated by a bipolar process and a power supply element 17 also fabricated by a bipolar process are provided side by side.
In a series regulator, which is one of the most common types of power supply devices, the power loss therethrough is determined by calculating the difference between the input and output voltages and then multiplying the result by the output current. Accordingly, the power loss can be reduced by reducing the difference between the input and output voltages. In this case, an effective way to achieve that is to use, as the power supply element 17, a PNP transistor having a vertical structure. The reason is that, in a PNP transistor having a vertical structure, which has a collector electrode and a base electrode formed on the top surface of a chip and has an emitter electrode formed on the bottom surface of the chip, the collector current flows from the top surface to the bottom surface of the chip.
However, even a PNP transistor having a vertical structure is not free from an emitter-collector saturation voltage inherent in the physical properties thereof, and thus it is impossible to reduce the difference between the input and output voltages to smaller than the emitter-collector saturation voltage. Specifically, the limit that cannot be surmounted is generally believed to be about 0.3 V, although it somewhat varies with the magnitude of the output current and from one PNP transistor to another.
Thus, one way to further reduce power loss is believed to be to use a power supply element fabricated by a MOS process. When a power supply element fabricated by a MOS process is combined with a control IC fabricated by a bipolar process, the low on-state resistance of a MOS semiconductor can be exploited to realize lower power loss than when, as conventionally practiced, a PNP transistor fabricated by a bipolar process is used.
However, incorporating such two chips, namely a control IC fabricated by a bipolar process and a power supply element fabricated by a MOS process, into a single package poses the following challenges: how to prevent heat-induced breakdown of the MOS semiconductor and how to prevent electrostatic breakdown of the bipolar semiconductor.